System Validation Engineer (Various Levels)
AsteralabsRole Overview
Asteralabs is hiring a staff-level System Validation Engineer (Various Levels). This is a full-time role in Vancouver. posted 2 weeks ago. Full responsibilities, required qualifications, and the apply link are listed in the description below.
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Job description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Role Overview
Astera Labs is seeking System Validation Engineers across multiple levels to lead post‑silicon bring‑up and system validation for high‑performance PCIe and CXL memory expansion products used in AI and cloud data centers. You will design and execute validation plans, automate data‑centric test flows, drive root‑cause investigations across silicon, firmware, hardware, and systems, and work directly with customers to validate real world performance and interoperability.
This role is based in our Vancouver office, which is a strategic growth hub for Astera Labs' validation team. You'll have the opportunity to be a foundational member of this expanding site while collaborating closely with our core team in San Jose. This is a unique chance to help shape the team's culture, processes, and technical direction as we scale our validation capabilities to meet surging demand for AI infrastructure connectivity.
What Success Looks Like:
- New silicon and platforms brought up on schedule with reproducible validation results
- Automated test suites that reduce manual effort and provide clear pass/fail and performance metrics
- Rapid, data-backed root-cause resolution of system issues and strong customer satisfaction during integration
Key Responsibilities
- Validation Planning & Strategy
- Create comprehensive validation plans for AI fabric switch products covering functionality, performance, reliability, and interoperability
- Contribute to compliance testing strategies and adapt consortium test cases for execution from x86 and ARM platforms
- Produce clear, data-driven validation reports and status updates for internal stakeholders and customers
- Silicon & System Bring-Up
- Lead silicon and platform bring-up activities, verify boot and runtime behavior on x86 and ARM systems
- Ensure timely readiness for customer engagements and product launches
- Debug complex issues across PCIe, CXL, NVMe, Ethernet, firmware, and hardware layers using protocol analyzers, logic analyzers, and CPU-based tool suites
- Test Automation & Infrastructure
- Develop robust, repeatable automation for IC and board testing with emphasis on execution efficiency, data collection, analysis, and automated reporting
- Design experiments to root-cause unexpected behavior and report results and specification compliance in an automated fashion
- Customer & Cross-Functional Collaboration
- Collaborate directly with customers to capture system requirements, reproduce customer scenarios, and demonstrate product capabilities
- Drive cross-functional root-cause analysis with silicon, firmware, hardware, and system teams and document findings and corrective actions
Basic Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
- 2-12+ years of experience supporting or developing complex SoC or silicon products for server, storage, or networking domains (level dependent)
- Working understanding of x86 and ARM architectures and UEFI/Linux boot sequences
- Solid grasp of high-speed signaling principles
- Hands-on experience with high-speed protocols such as PCIe, CXL, NVMe, or Ethernet
- Proven experience in silicon and system bring-up, validation, and debug in lab and customer environments
- Strong Python automation skills for bench control, test orchestration, data analysis, and reporting
- Experience with lab equipment including protocol analyzers, logic analyzers, in-circuit debuggers, and CPU-based tool suites
- Strong prioritization, planning, and independent execution skills with a customer-focused mindset
Preferred Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, or related field
- Working knowledge of C or C++ for embedded firmware and device drivers
- Familiarity with PCIe compliance standards and experience adapting consortium tests for platform execution
- Advanced understanding of memory architectures, high-speed signaling, and system boot flows
- Track record of influencing cross-functional teams and navigating complex matrixed organizations
- Entrepreneurial, can-do attitude with ability to think and act with the customer in mind
The base salary range for this role is $125,000 - $290,000 CAD depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
About Asteralabs
Frequently Asked Questions
How do I apply for the System Validation Engineer (Various Levels) position at Asteralabs?
Use the Apply button above to submit your application directly to Asteralabs. Most applications take less than 5 minutes if your resume and contact details are ready, and you'll be routed to the employer's official application system to finish.
Where is the System Validation Engineer (Various Levels) position at Asteralabs located?
This position is based in Vancouver. Asteralabs has not indicated remote or hybrid options for this role, so candidates should plan for on-site work.
What does a System Validation Engineer (Various Levels) at Asteralabs earn?
Asteralabs has not disclosed a salary range in this posting. Many employers share specifics later in the interview process; you can also ask during a recruiter screen if compensation transparency is important to you.
When was the System Validation Engineer (Various Levels) role at Asteralabs posted?
This role was posted on June 25, 2026 (16 days ago). It's still listed as actively hiring; we re-confirm openings against the source system multiple times per day and remove closed roles.
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