Role Overview
Asteralabs is hiring a Senior SoC Verification/Validation Engineer. This is a full-time role in San Jose. posted 2 weeks ago. Full responsibilities, required qualifications, and the apply link are listed in the description below.
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Job description
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Job Description
We are looking for Senior SoC Verification/Validation Engineer who are passionate about bringing next-generation SoCs to life on industry-leading emulation platforms. You will play a critical role in validating complex SoCs for AI connectivity and cloud infrastructure, ensuring functionality and performance well before silicon tape-out.
Basic Responsibilities
- Play a key role in developing complex SOCs for AI connectivity and cloud infrastructures
- Bring up and validate high-speed serial interfaces such as PCIe, Ethernet and UALink, and overall SoC functionality
- Collaborate closely with Architecture, Design, Verification, and SW/FW teams to define and execute functional/performance validation plans
- Develop C/C++ FW and tests to validate and execute all test plan items
- Build tools and methodologies to validate and debug all HW and SW/FW issues on the emulation platform
Required Qualification
- BS/MS in Electrical Engineering, Computer Engineering or related field.
- 5+ years of hands-on experience in pre-silicon verification/validation.
- Strong hands-on experience in running and debugging SOC simulation.
- Protocol knowledge in high-speed protocols such as PCIe, UALink and/or Ethernet is essential
- Proficiency in programming and scripting languages (System Verilog, C/C++, Python)
- Strong debugging and analytical skills
- Excellent communication skills and ability to work independently with minimal supervision.
- Currently based locally or open to relocation.
Preferred Experience:
- Bring up and validation experience using the industry standard emulation platforms (Palladium or Zebu)
- Hands-on experience in running and debugging SOC simulation and emulation platforms.
The base salary range is $165,000 USD - $195,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
About Asteralabs
Frequently Asked Questions
How do I apply for the Senior SoC Verification/Validation Engineer position at Asteralabs?
Use the Apply button above to submit your application directly to Asteralabs. Most applications take less than 5 minutes if your resume and contact details are ready, and you'll be routed to the employer's official application system to finish.
Where is the Senior SoC Verification/Validation Engineer position at Asteralabs located?
This position is based in San Jose. Asteralabs has not indicated remote or hybrid options for this role, so candidates should plan for on-site work.
What does a Senior SoC Verification/Validation Engineer at Asteralabs earn?
Asteralabs has not disclosed a salary range in this posting. Many employers share specifics later in the interview process; you can also ask during a recruiter screen if compensation transparency is important to you.
When was the Senior SoC Verification/Validation Engineer role at Asteralabs posted?
This role was posted on June 25, 2026 (17 days ago). It's still listed as actively hiring; we re-confirm openings against the source system multiple times per day and remove closed roles.
How much experience does the Senior SoC Verification/Validation Engineer role at Asteralabs require?
This is a senior-level position. Most senior roles call for 5+ years of directly relevant experience. Asteralabs lists their specific requirements in the description below, so review the must-have qualifications closely before applying.
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