Senior IC Package Design Engineer (Silicon Engineering)

Full Timesenior

Austin, TXPosted 3 days ago

Role Overview

SpaceX is hiring a Senior IC Package Design Engineer (Silicon Engineering). This is a full-time role in Austin. posted 3 days ago. Full responsibilities, required qualifications, and the apply link are listed in the description below.

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ORSpaceXTodayMarsSRICPACKAGEDESIGN

Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. IC PACKAGE DESIGN ENGINEER (SILICON ENGINEERING)

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. As an IC Package Design Engineer, you will be an integral part of the IC design team and lead packaging for custom in-house ASICs and RFICs for digital beam formers and modems.

RESPONSIBILITIES:

Own and drive advanced package selection, new product BGA configuration and package structure
Responsible for package/SIP layout, optimization, design verification and tapeout
Interface and coordinate with cross-functional groups throughout SpaceX on new product package selection, feasibility analysis and design
Work cross-functionally, understand trade-offs, constraints, and optimizing silicon floor plan, bump and package pin out
Simulate and optimize signal/power integrity and RF performance of the package design
Drive methodology, innovations, and productivity improvements in package design

BASIC QUALIFICATIONS:

Bachelor's degree in electrical engineering, computer engineering, or physics
5+ years of experience with IC package design

PREFERRED SKILLS AND EXPERIENCE:

Experience with Co-packaged Optics (CPO)
Thorough understanding of signal and power integrity fundamentals
Substrate design experience for RF, digital, high-speed and mixed signal die
Experience with Cadence APD+/SIP or similar design tools
Experience in package design electrical review, SI/PI analysis
Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, ADS
Experience in package design for manufacturing reviews
Familiar with BGA package substrate technologies
Strong problem solving skills with strong engineering fundamentals

ADDITIONAL REQUIREMENTS:

Ability to work extended hours or weekends as needed to meet mission critical deadlines

ITAR REQUIREMENTS:

To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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Frequently Asked Questions

How do I apply for the Senior IC Package Design Engineer (Silicon Engineering) position at SpaceX?

Use the Apply button above to submit your application directly to SpaceX. Most applications take less than 5 minutes if your resume and contact details are ready, and you'll be routed to the employer's official application system to finish.

Where is the Senior IC Package Design Engineer (Silicon Engineering) position at SpaceX located?

This position is based in Austin. SpaceX has not indicated remote or hybrid options for this role, so candidates should plan for on-site work.

What does a Senior IC Package Design Engineer (Silicon Engineering) at SpaceX earn?

SpaceX has not disclosed a salary range in this posting. Many employers share specifics later in the interview process; you can also ask during a recruiter screen if compensation transparency is important to you.

When was the Senior IC Package Design Engineer (Silicon Engineering) role at SpaceX posted?

This role was posted on July 20, 2026 (3 days ago). It's still listed as actively hiring; we re-confirm openings against the source system multiple times per day and remove closed roles.

How much experience does the Senior IC Package Design Engineer (Silicon Engineering) role at SpaceX require?

This is a senior-level position. Most senior roles call for 5+ years of directly relevant experience. SpaceX lists their specific requirements in the description below, so review the must-have qualifications closely before applying.