Analog IC Layout Engineer

Full Timejunior

Fremont, California, United StatesPosted 17 days ago

Role Overview

Neuralink is hiring a entry-level Analog IC Layout Engineer. This is a full-time role in Fremont, California. posted 2 weeks ago. Full responsibilities, required qualifications, and the apply link are listed in the description below.

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Job description

About Neuralink:

We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.

Team Description:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Job Description and Responsibilities:

We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include:

Crafting state-of-the-art layouts for mixed-signal and analog circuits

Amplifiers
Filters
Switched capacitor circuits
Oscillators
Data converters
Power management circuits

Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers
Physical verification of custom IC mask layouts (LVS, DRC, ERC)

Required Qualifications:

2+ years of experience in analog and mixed-signal IC layout design
1+ year experience with FinFET technologies
Ability to identify the best approach to solving problems

Preferred Qualifications:

Programming/scripting knowledge in SKILL, TCL, Shell, C/C++, and/or Python
Proven expertise in implementing analog and mixed-signal layout designs, achieving tight matching, low noise, and low power consumption
Understanding on failure-prone circuit and layout structures
Experience with analog DFM standards
Experience with layout P-cell design and implementation
Experience with layout automation

Expected Compensation:

The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees’ success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.

Base Salary Range:

$83,000—$139,000 USD

What We Offer:

Full-time employees are eligible for the following benefits listed below.

An opportunity to change the world and work with some of the smartest and most talented experts from different fields
Growth potential; we rapidly advance team members who have an outsized impact
Excellent medical, dental, and vision insurance through a PPO plan
Paid holidays
Commuter benefits
Meals provided
Equity (RSUs) *Temporary Employees & Interns excluded
401(k) plan *Interns initially excluded until they work 1,000 hours
Parental leave *Temporary Employees & Interns excluded
Flexible time off *Temporary Employees & Interns excluded

About Neuralink

Neuralink

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Frequently Asked Questions

How do I apply for the Analog IC Layout Engineer position at Neuralink?

Use the Apply button above to submit your application directly to Neuralink. Most applications take less than 5 minutes if your resume and contact details are ready, and you'll be routed to the employer's official application system to finish.

Where is the Analog IC Layout Engineer position at Neuralink located?

This position is based in Fremont, California. Neuralink has not indicated remote or hybrid options for this role, so candidates should plan for on-site work.

What does a Analog IC Layout Engineer at Neuralink earn?

Neuralink has not disclosed a salary range in this posting. Many employers share specifics later in the interview process; you can also ask during a recruiter screen if compensation transparency is important to you.

When was the Analog IC Layout Engineer role at Neuralink posted?

This role was posted on June 22, 2026 (17 days ago). It's still listed as actively hiring; we re-confirm openings against the source system multiple times per day and remove closed roles.

Is the Analog IC Layout Engineer role at Neuralink entry-level?

Yes. This is an entry-level position. Strong candidates typically have 0-2 years of relevant work experience, internships, or significant project work. Read the full description for any specific qualification requirements Neuralink has listed.