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ASIC/SOC Silicon Physical Design Engineer

Matx
Full Timesenior
Mountain View, CAPosted 5 weeks ago

Role Overview

Matx is hiring a senior-level ASIC/SOC Silicon Physical Design Engineer. This is a full-time role in Mountain View. Full responsibilities, required qualifications, and the apply link are listed in the description below.

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Job description

What MatX Is Building

MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking silicon physical design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Silicon Physical Design Engineers will be responsible for developing performant and functionally correct silicon for MatX products across compute, memory management, high-speed connectivity, and other key technologies in leading-edge process nodes.

What You'll Do Here

  • Contribute to MatX’s Physical Design methodology to achieve a scalable solution across block, subsystem, and fullchip designs from RTL to GDSII
  • Own entire subsystems or subsets and/or chip-level Physical Design deliverables including but not limited to: construction (partitioning, floorplanning, synthesis, place & route, clocking) and sign-off (equivalency, extraction, timing, power estimation, EMIR, physical verification)
  • Plan and drive intermediate and sign-off reviews. Report execution progress towards various silicon milestones including design freeze and tapeout
  • Work closely with the Design, DFT, and other Physical Design co-owners of the subsystem/block in question to deliver best-in-class Performance-Power-Area results

Who You Are

  • Bachelor of Science in Electrical Engineering or equivalent
  • Minimum 8 years of industry experience in ASIC Physical Design
  • Great interpersonal and communication skills
  • Strong proficiency in programming languages such as Perl, Python, and TCL
  • Expertise driving Physical Design construction and sign-off for blocks, subsystems, and/or fullchip from early RTL to production silicon
  • Experience collaborating with Design, Verification, and DFT teams to structure, partition, and optimize designs for PPA through sign-off

Bonus Points If You Have

  • 8 years of industry experience in ASIC Physical Design
  • Experience working with third-party Design Services partners

Compensation

The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.

  • Early Career - $120,000 - $250,000 + equity
  • Mid Career - $175,000 - $362,500 + equity
  • Senior Career - $250,000 - $475,000 + equity

What We Offer

  • A Stake in our success A flexible cash equity compensation mix that fits your needs
  • Heath & Wellness Company subsidized Health, Dental, Vision, and Life insurance; Pre-tax Health Savings Accounts with generous company contribution (even if you don’t)
  • Time To Recharge 4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year
  • Support to Parents Up to 12 weeks of paid parental leave, regardless of your path to parenthood
  • Learning & Development $1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities
  • Team Connection Team Lunches, quarterly off-sites, and regular town halls
  • Financial Wellbeing 401K and/or Roth IRA, with 5% company contribution, even if you don’t!
  • Flexible Spending Accounts Pre-tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses
  • Commute On Us For those commuting up to 1 hour, put your rideshare cost on our company card and reclaim the drive-time to get work done!
  • MatX E[x]tras $50 per month to use on the perks you care about most 
  • Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi expense reimbursement

As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other legally recognized protected basis under federal, state or local laws, regulations or ordinances.

All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays.

This position requires access to information that is subject to U.S. export controls. This offer of employment is contingent upon the applicants capacity to perform job functions in compliance with U.S. export control laws without obtaining a license from U.S. export control authorities.

 

MatX does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or People team and any resumes submitted are deemed to be the property of MatX.

About Matx

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Matx

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Frequently Asked Questions

How do I apply for the ASIC/SOC Silicon Physical Design Engineer position at Matx?

Use the Apply button above to submit your application directly to Matx. Most applications take less than 5 minutes if your resume and contact details are ready, and you'll be routed to the employer's official application system to finish.

Where is the ASIC/SOC Silicon Physical Design Engineer position at Matx located?

This position is based in Mountain View. Matx has not indicated remote or hybrid options for this role, so candidates should plan for on-site work.

What does a ASIC/SOC Silicon Physical Design Engineer at Matx earn?

Matx has not disclosed a salary range in this posting. Many employers share specifics later in the interview process; you can also ask during a recruiter screen if compensation transparency is important to you.

When was the ASIC/SOC Silicon Physical Design Engineer role at Matx posted?

This role was posted on June 3, 2026 (36 days ago). It's still listed as actively hiring; we re-confirm openings against the source system multiple times per day and remove closed roles.

How much experience does the ASIC/SOC Silicon Physical Design Engineer role at Matx require?

This is a senior-level position. Most senior roles call for 5+ years of directly relevant experience. Matx lists their specific requirements in the description below, so review the must-have qualifications closely before applying.

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