FPGA Associate (Fall 2026)

San FranciscoPosted 21 days ago

Role Overview

Astranis is hiring a entry-level FPGA Associate (Fall 2026). This is a internship role in San Francisco. Part of Astranis's Security hiring, posted 3 weeks ago. Full responsibilities, required qualifications, and the apply link are listed in the description below.

Salary Context

Salary is not disclosed in this posting. Market median for Junior-level Security roles is $84k-$120k (based on 83 comparable listings). Many employers share specifics during the interview process or after an initial screen.

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Job description

Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today, Astranis satellites provide dedicated, secure networks to highly-sophisticated customers across the globe— large enterprises, sovereign governments, and the US military. With five satellites on orbit and many more set to launch soon, the company is servicing a backlog of more than $1 billion of commercial contracts.

Astranis is the preferred satellite communications partner for buyers with stringent requirements for uptime, data security, network visibility, and customization. Astranis has raised over $750 million from some of the world’s best investors, from Andreessen Horowitz to Blackrock and Fidelity, and employs a team of 450 engineers and entrepreneurs. Astranis designs, builds, and operates its satellites out of its 153,000 sq. ft. headquarters in Northern California, USA.

FPGA Engineer Associate (Fall 2026)

Associate positions at Astranis typically last for twelve weeks, and are salaried roles designed for new grads who have who have graduated from a four-year university.

As an associate, you will have an amazing opportunity to work on hard problems — we pride ourselves on giving everyone at Astranis a chance to do meaningful work on challenging projects, no matter their seniority. Many past associates have designed and tested hardware/software that is heading to space on our first satellite, and many of them are now full-time employees at Astranis.

If you have not yet graduated from a four-year university, please apply to be an Intern.

Role

RTL Development for FPGA targeted applications
Work with multiple FPGAs and toolchains
Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs
Write software to interface and test RTL in hardware
Collaborate closely with electrical and software engineers

Requirements

A B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent
A passion for hardware development, including working in a fast-paced environment and hands-on design and development
Experience in designing, implementing, and testing high throughput systems implemented on FPGAs
Proficiency with Verilog/SystemVerilog for synthesis
Don't meet them all? Not a problem. Please apply even if you do not meet all these criteria.

Bonus:

Experience with UVM and advanced SystemVerilog verification
Experience with Xilinx FPGAs
Experience with Vivado IDE, TCL
Familiarity with system level estimates and implications of power, thermal, and real estate
Experience with high speed data converters (ADCs, DACs, JESD204B)
Experience with circuit level debugging
Experience with digital communication theory and implementation, such as LDPC implementations
Experience with space-based systems
Experience with modern communication systems (RF, IF/IQ, time/freq domains, modulation)
Experience in at least 1 domain beyond logic design. This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.

The base salary for this position is $1,925 per week.

Base Salary

$1,925—$1,925 USD

U.S. Citizenship, Lawful Permanent Residency, or Refugee/Asylee Status Required

(To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States, or other protected individual as defined by 8 U.S.C. 1324b(a)(3))

Our mission and our products are meant to connect the world and everyone in it, regardless of gender, race, creed, or any other distinction. We believe in a diverse and inclusive workplace, and we encourage all people to join our team and bring their unique perspective to help make us stronger.

About Astranis

Astranis

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Frequently Asked Questions

How do I apply for the FPGA Associate (Fall 2026) position at Astranis?

Use the Apply button above to submit your application directly to Astranis. Most applications take less than 5 minutes if your resume and contact details are ready, and you'll be routed to the employer's official application system to finish.

Where is the FPGA Associate (Fall 2026) position at Astranis located?

This position is based in San Francisco. Astranis has not indicated remote or hybrid options for this role, so candidates should plan for on-site work.

What does a FPGA Associate (Fall 2026) at Astranis earn?

Astranis has not disclosed a salary range in this posting. Many employers share specifics later in the interview process; you can also ask during a recruiter screen if compensation transparency is important to you.

When was the FPGA Associate (Fall 2026) role at Astranis posted?

This role was posted on June 30, 2026 (21 days ago). It's still listed as actively hiring; we re-confirm openings against the source system multiple times per day and remove closed roles.

Is the FPGA Associate (Fall 2026) role at Astranis entry-level?

Yes. This is an entry-level position. Strong candidates typically have 0-2 years of relevant work experience, internships, or significant project work. Read the full description for any specific qualification requirements Astranis has listed.

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