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Senior FPGA Engineer (Starshield)

SpaceX
Full Timesenior
Hawthorne, CA$160k – $225kPosted 7 days ago

Job Description

<div class="content-intro"><p>SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of&nbsp;enabling human life on Mars.</p></div><p><strong><span data-contrast="auto">SR. FPGA ENGINEER (STARSHIELD)</span></strong></p> <p><span data-contrast="auto">Starshield leverages SpaceX’s launch capability and Starlink technology to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on earth observation, communications, and hosted payloads.</span></p> <p><span data-contrast="auto">The satellite engineering team is hiring for satellite programs that are pushing the boundaries of in-space capabilities. Our missions support scientific research, classified national security space and commercial opportunities. Software engineering and innovation is at the core of these programs.</span></p> <p><span data-contrast="auto">The satellite software team is building highly reliable in-space networks, designing secure systems to guarantee access to space, and creating autonomous satellite operation systems, and more. Aerospace experience is not required to be successful here - we want our engineers to bring fresh ideas from all areas, love solving problems, and seek to make an impact on an inspiring mission. As we expand this team, we're looking for versatile, driven, and collaborative engineers. </span><span data-ccp-props="{}">&nbsp;</span></p> <p><span data-contrast="auto">As a Sr. FPGA Engineer on the satellite digital design team, you will be designing, developing, and testing FPGAs that supports safety critical logic, sensors, cryptography, and RF/optical communications systems for SpaceX’s satellite constellation. You will engage with other SpaceX engineers to discover the needs of the missions and code highly reliable digital designs which turn the mission into reality. You will be responsible for the complete lifecycle of the FPGA designs you create, including development, testing, and support.</span><span data-ccp-props="{&quot;134233117&quot;:true,&quot;134233118&quot;:true,&quot;201341983&quot;:0,&quot;335559739&quot;:160,&quot;335559740&quot;:240}">&nbsp;</span></p> <p><strong><span data-contrast="auto">RESPONSIBILITIES: </span></strong></p> <ul> <li><span data-contrast="auto">Own the conceptual, architectural, and design components of digital, signal processing, and communication systems supporting various SpaceX satellite spacecraft </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Implement logic designs and signals processing algorithms in RTL </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Integrate designs onto FPGA/SoC platforms </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Bring up and validate devices that communicate to and fly in space</span></li> <li>Work in close collaboration with RF/antenna, software, and other DSP engineers to design and validate software-defined radio systems <span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">BASIC QUALIFICATIONS: </span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{&quot;335552541&quot;:1,&quot;335559685&quot;:720,&quot;335559991&quot;:360,&quot;469769226&quot;:&quot;Symbol&quot;,&quot;469769242&quot;:[8226],&quot;469777803&quot;:&quot;left&quot;,&quot;469777804&quot;:&quot;&quot;,&quot;469777815&quot;:&quot;multilevel&quot;}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">Bachelor’s degree in computer science, electrical engineering, math or other engineering discipline and 5+ years of professional software development experience; OR 7+ years of professional experience in software development in lieu of a degree</span><span data-ccp-props="{}">&nbsp;</span></li> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{&quot;335552541&quot;:1,&quot;335559685&quot;:720,&quot;335559991&quot;:360,&quot;469769226&quot;:&quot;Symbol&quot;,&quot;469769242&quot;:[8226],&quot;469777803&quot;:&quot;left&quot;,&quot;469777804&quot;:&quot;&quot;,&quot;469777815&quot;:&quot;multilevel&quot;}" data-aria-posinset="2" data-aria-level="1"><span data-contrast="auto">2+ years experience developing for FPGA platforms</span><span data-ccp-props="{&quot;134233117&quot;:false,&quot;134233118&quot;:false,&quot;335551550&quot;:0,&quot;335551620&quot;:0,&quot;335559738&quot;:0,&quot;335559739&quot;:0}">&nbsp;</span></li> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{&quot;335552541&quot;:1,&quot;335559685&quot;:720,&quot;335559991&quot;:360,&quot;469769226&quot;:&quot;Symbol&quot;,&quot;469769242&quot;:[8226],&quot;469777803&quot;:&quot;left&quot;,&quot;469777804&quot;:&quot;&quot;,&quot;469777815&quot;:&quot;multilevel&quot;}" data-aria-posinset="2" data-aria-level="1"><span data-ccp-props="{&quot;134233117&quot;:false,&quot;134233118&quot;:false,&quot;335551550&quot;:0,&quot;335551620&quot;:0,&quot;335559738&quot;:0,&quot;335559739&quot;:0}">2+ years experience using Verilog, SystemVerilog, or VHDL</span></li> </ul> <p><strong><span data-contrast="auto">PREFERRED SKILLS AND EXPERIENCE: </span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Experience working with complex digital designs </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience in different stages of FPGA development: RTL design, verification, synthesis, timing analysis, lab bring up/validation </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience integrating logic onto SoC platforms and designing high-throughput PS/PL interfaces </span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience developing firmware for Xilinx FPGA platforms using the Xilinx toolchain</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience interfacing with high-rate conversion interfaces (Xilinx RFSoC, AD9361)</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-ccp-props="{}">Experience with common electronic components and comfortable reading circuit design schematics and contributing to hardware design discussions&nbsp;</span></li> <li>Experience developing software for embedded systems in C or C++, or significant experience in another software language</li> <li>Knowledge of DSP concepts including but not limited to spread spectrum, forward error correction, channel estimation, front end theory, impairment recovery, modulation schemes</li> <li>Understanding of signal transformations and processing such as FFT, correlation, FIR filter, and IIR filter</li> <li>Excellent leadership, communication and teamwork skills </li> </ul> <p><strong><span data-contrast="auto">ADDITIONAL REQUIREMENTS:</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li>This position requires successfully obtaining and maintaining a Top Secret Security Clearance as a condition of employment. While the clearance may not be immediately necessary upon hire, we encourage you to initiate the application process promptly upon accepting this offer. Your ability to secure the necessary clearance is essential for fulfilling key responsibilities of the role. Should you be unable to obtain it, SpaceX reserves the right to modify or terminate your employment to align with operational needs</li> <li><span data-contrast="auto">Must be willing to work extended hours and weekends as needed </span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">COMPENSATION AND BENEFITS: </span></strong><span data-ccp-props="{}">&nbsp;</span></p> <div>Pay Range:</div> <div>FPGA Engineer/Senior: <span data-contrast="auto">$160,000.00 - $225,000.00/per year</span><span data-ccp-props="{}">&nbsp;</span></div> <p><span data-contrast="auto">Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.</span><span data-ccp-props="{}">&nbsp;</span></p> <div> <p>Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees accrue paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law.</p> </div><div class="content-conclusion"><p><strong>ITAR REQUIREMENTS:</strong></p> <ul> <li>To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR <a href="https://www.pmddtc.state.gov/?id=ddtc_kb_article_page&amp;sys_id=24d528fddbfc930044f9ff621f961987">here</a>. &nbsp;</li> </ul> <p>SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.</p> <p>Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to&nbsp;<a href="mailto:EEOCompliance@spacex.com">EEOCompliance@spacex.com</a><em>.&nbsp;</em></p></div>

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