Job Description
Title: Memory Layout Engineer
Location: Ontario (Ottawa), Canada
- Hands-on experience with SRAM, register files, ROM, TCAM layouts of important memory building blocks like control, sense amplifiers, I/O Blocks, bit cell array and decoders etc.
- Should have worked on at least 7nm Finfet process technologies. 6nm, 5nm, 4nm,3nm will be an added advantage .
- Hands on experience with top level memory integration and DRC, LVS, Density verification and cleaning physicals across the Memory.
- Good hold on IR/EM related issues in memory layouts.
If interested, please share your resume on SACHIN.VERMA@QUEST-GLOBAL.COM
Want AI-powered job matching?
Upload your resume and get every job scored, your resume tailored, and hiring manager emails found - automatically.
Get Started Free